RTL Design engineer
The Judge Group Inc.

San Jose, California


Location: San Jose, CA
Description: Our client is seeking RTL Design engineer contract in Austin TX or San Jose, CA.

The ideal candidate should have a BS or MS degree in EE or CS or related degrees and 10 or more years of industry experience in RTL design verification for CPUs or DSPs, and the following qualifications:

1. RTL implementation level understanding of CPUs

2. Hands-on experience with RTL design of several CPU subsystems, such as CPU caches, branch predictors, execution units, Load/store pipeline, and last level cache controllers

3. Understanding CPU design verification flow and UVM based Design verification flows where embedded CPUs are used and coordinating with verification teams

4. Familiarity with interconnect and debug interfaces such as AXI, ACE, CHI, APB, etc.

5. Strong written and verbal communication skills

6. Capability to work in international and diverse environments.

Please send resume to rmarsh@judge.com and I will call you.

Contact: rmarsh@judge.com

This job and many more are available through The Judge Group. Find us on the web at www.judge.com



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